From the US patent : Patent number: 6367040
System and method for determining yield impact for semiconductor devices
It's estimate the yield impact by two step:
Step 1: calculate each defect's kill probability(the chance for die fail if this die own the defec)
Step 2: calculate the total yield loss according to the above kill probability
We can use the patent's idea for defect or pattern type's yield impact modeling.
First, use logistic regression to get the kill probability for each defect/pattern
Then, use the above kill probability to estimate the yield impact.
For defect type data, we have following data:
Each die's final result(pass or fail), which defect(s) fall in this die.
Summary data format as following:
Die's Result/Defect1/Defect2/.../DefectN
0 0 1 .... 0
1 0 1 1
...
where 0 for pass die or no defect
1 for fail die or own that defect
First we fit the logistic regression with response variable as die's result, explain variables as defect1 ... defectN
Then each defect's kill probability equals the proportion of the odds
For each fail die, we assign each defect to response the yield loss by it's kill probability.
for example, if we have 5 defect types, defect1,..., defect5 with kill probability (0.1,0.1,0.3,0.2,0.3)
if die1 is fail and with defect1 and defect5 located,
then we assign defect1 has yield loss 0.1/0.4 and defect5 has yield loss 0.3/0.4 for this die.
After summary all the fail dies, we can get the estimated yield for each defect type.
For pattern type data, replace 0 or 1 with the true yield loss, and we still have the same result.
The example R core as following
